Weidong Zhang's Home Page

 

Dr Weidong Zhang, Beng, Msc, PhD (Liverpool)

Reader in Microelectronics

Research collaboration with IMEC(Belgium) International SEMATECH (USA), and other industrial organisations and universities.

 

Contact

519a, School of Engineering, Liverpool John Moores University, L3 3AF, UK
Tel: +44 151 231 2868
Fax:  +44 151 231 2453
Email: W.ZHANG@LJMU.AC.UK

 

Career Profile

Present:        Reader in Microelectronics,  Liverpool JMU

2002-2005:    Lecturer in Microelectronics,  Bournemouth University

1992-1999:    Associate Professor/Lecturer,  Xidian University

    Research Profile 

    Authored and co-authored more than 20 technical publications. 

    One EPSRC research grant.

    One HEFCE Promosing Researcher Grant.

    Two PhD researchers under supervision.

    Completion of one PhD and more than 5 MSc research project supervision

    Collaborative research with industrial companies and universities.

    Dr Zhang's research has been financially supported by the EPSRC, HEFCE.

     

    Research Interests

    Reliability of gate dielectrics in CMOS devices.

    VLSI devices and Processing;  

    Digital/Analogue/Mixed Signal/RF ASIC design; 

     

    Research Projects

    Stress-Induced Leakage Current (SILC) in Thin Gate Oxides of MOSFETs, Sponsored by EPSRC.

    Characterisation of high-k dielectrics for Flash memory applcations, collaborating with IMEC.

    Promising Researcher Grant, Sponsored by HEFCE.

     

    Teaching Responsibilities

    Teaching Beng/Bsc/Msc programmes in Electrical and Electronic Engineering.

     

    Recent publications  A list of recent publications since 2000 in top-quality international journals:

     

    X. F. Zheng, C. Robinson, W.D.Zhang, J.F.Zhang, B. Govoreanu, J. van Houdt
    Electron trapping in HfAlO high-κ stack for Flash memory applications: an origin of Vth window closure during cycling operations

    accepted for publication in IEEE Trans. Elec. Dev. October 2011.

     

    X. F. Zheng, W. D. Zhang, B. Govoreanu, J. F. Zhang, J. van Houdt
    A new multi-pulse technique for probing electron trap energy distribution in high-κ materials for Flash memory application
    IEEE Trans. Elec. Dev. vol.57, No.10, pp.2484-2492

     

    D. Ruiz Aguado, B. Govoreanu, W. D. Zhang, M. Jurczak, K. De Meyer, J. van Houdt
    A novel trapping/detrapping model for defect profiling in high-k materials using the two-pulse capacitance-voltage technique
    IEEE Trans. Elec. Dev. vol. 57, No. 10, pp.2726-2735

     

    X. F. Zheng, W. D. Zhang, B. Govoreanu, D. Ruiz Aguado, J. F. Zhang, J. van Houdt
    Energy and Spatial Distribution of Electron Traps throughout SiO2/Al2O3 Stacks as the IPD in Flash Memory Application
    IEEE Trans. Electron Dev., vol. 57, No. 1, pp.288-296, 2010.

     

    Z, Ji, J.F.Zhang, W. D. Zhang, G. Groeseneken, L. Pantisano, S. De Gendt, M.M.Heyns
    An assessment of the mobility degradation induced by remote charge scattering
    Applied Physics Letters, Vol. 95, No. 26, Article number: 263502, 2010 

     

    X. F. Zheng, W. D. Zhang, B. Govoreanu, J.F.Zhang, J. van Houdt
    A discharge-based multi-pulse technique (DMP) for probing electron trap energy distribution in high-k materials for Flash memory application
    IEDM, 2009.

     

    X. F. Zheng, W. D. Zhang, B. Govoreanu, J.F.Zhang, J. van Houdt,
    Impact of PDA temperature on electron trap energy and spatial distributions in SiO2/Al2O3 stack as the IPD in Flash memory cells
    Microelectronic Engineering, vol.86, pp.1834–1837, 2009.

     

    W. D. Zhang, B. Govoreanu , X. F. Zheng,  D. Ruiz Aguado, M. Rosmeulen, P. Blomme, J. F. Zhang, J. Van Houdt
    Two-pulse C-V: A new method for characterizing electron traps in the bulk of SiO2/high-k dielectric stacks
    IEEE Electron Device Letters, vol.29, no. 9, pp1043-1046, 2008.

     

    W. D. Zhang, J. F. Zhang, C. Z. Zhao, M. H. Chang, G. Groeseneken, and R. Degraeve
    Electrical signature of the defect associated with gate oxide breakdown
    IEEE Electron Device Letters, vol.27, no. 5, pp393-395, 2006.

     

    M. H. Chang, J. F. Zhang, and W. D. Zhang
    An assessment of capture cross sections and effective density of electron traps generated in silicon dioxides
    IEEE Trans. Electron Devices, vol.53, no.6, pp1347-1354, 2006.

     

    Zhang WD, Zhang JF, Lalor MJ, et al.
    Effects of detrapping on electron traps generated in gate oxides
    SEMICONDUCTOR SCIENCE AND TECHNOLOGY 18 (2): 174-182 FEB 2003

     

    Zhang WD, Zhang JF, Lalor M, et al.
    Two types of neutral electron traps generated in the gate silicon dioxide
    IEEE TRANSACTIONS ON ELECTRON DEVICES 49 (11): 1868-1875 NOV 2002

     

    Zhang WD, Zhang JF, Lalor M, et al.
    On the mechanism of electron trap generation in gate oxides
    MICROELECTRONIC ENGINEERING 59 (1-4): 89-94 NOV 2001

     

    Zhang WD, Zhang JF, Uren MJ, et al.
    Dependence of energy distributions of interface states on stress conditions
    MICROELECTRONIC ENGINEERING 59 (1-4): 95-99 NOV 2001

     

    Zhang WD, Zhang JF, Uren MJ, et al.
    On the interface states generated under different stress conditions
    APPLIED PHYSICS LETTERS 79 (19): 3092-3094 NOV 5 2001

    Click here for a full list of journal publications

     

     

     



    Page last modified by Wei Zhang on 03 March 2011.
     
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