Weidong Zhang's Home Page
Dr Weidong Zhang, Beng, Msc, PhD (Liverpool)Research collaboration with IMEC(Belgium) International SEMATECH (USA), and other industrial organisations and universities. |
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Contact:
519a, School of Engineering, Liverpool John Moores University, L3 3AF, UK
Tel: +44 151 231 2868
Fax: +44 151 231 2453
Email: W.ZHANG@LJMU.AC.UK
Career Profile
2005-date: Senior Lecturer in Microelectronics, Liverpool JMU
2002-2005: Lecturer in Microelectronics, Bournemouth University
1992-1999: Associate Professor/Lecturer, Xidian University
Research Profile
Authored and co-authored more than 10 technical publications.
Member of the Microelectronics Research Group.
One EPSRC research grant.
One HEFCE Promosing Researcher Grant.
One PhD researchers under supervision.
Completion of more than 5 MSc research project supervision
Collaborative research with industrial companies and universities.
Dr Zhang's research has been financially supported by the EPSRC, HEFCE.
Reliability of gate dielectrics in CMOS devices.
VLSI devices and Processing;
Digital/Analogue/Mixed Signal/RF ASIC design;
Course Teaching Responsibilities
Teaching Beng/Bsc in electrical and electronic engineering
"Stress-Induced Leakage Current (SILC) in Thin Gate Oxides of MOSFETs," Sponsored by EPSRC.
Promising Researcher Grant, Sponsored by HEFCE.
A list of recent publications since 2000 in top-quality international journals:
X. F. Zheng, W. D. Zhang, B. Govoreanu, D. Ruiz Aguado, J. F. Zhang
Energy and Spatial Distribution of Electron Traps throughout SiO2/Al2O3 Stacks as the IPD in Flash Memory Application
accepted for publication in IEEE Trans. Elec. Dev. January 2010.
X. F. Zheng, W. D. Zhang, B. Govoreanu, J.F.Zhang, J. van Houdt
A discharge-based multi-pulse technique (DMP) for probing electron trap energy distribution in high-k materials for Flash memory application
IEDM, 2009.
X. F. Zheng, W. D. Zhang, B. Govoreanu, J.F.Zhang, J. van Houdt,
Impact of PDA temperature on electron trap energy and spatial distributions in SiO2/Al2O3 stack as the IPD in Flash memory cells
Microelectronic Engineering, vol.86, pp.1834–1837, 2009.
W. D. Zhang, B. Govoreanu , X. F. Zheng, D. Ruiz Aguado, M. Rosmeulen, P. Blomme, J. F. Zhang, J. Van Houdt
Two-pulse C-V: A new method for characterizing electron traps in the bulk of SiO2/high-k dielectric stacks
IEEE Electron Device Letters, vol.29, no. 9, pp1043-1046, 2008.
W. D. Zhang, J. F. Zhang, C. Z. Zhao, M. H. Chang, G. Groeseneken, and R. Degraeve
Electrical signature of the defect associated with gate oxide breakdown
IEEE Electron Device Letters, vol.27, no. 5, pp393-395, 2006.
M. H. Chang, J. F. Zhang, and W. D. Zhang
An assessment of capture cross sections and effective density of electron traps generated in silicon dioxides
IEEE Trans. Electron Devices, vol.53, no.6, pp1347-1354, 2006.
Zhang WD, Zhang JF, Lalor MJ, et al.
Effects of detrapping on electron traps generated in gate oxides
SEMICONDUCTOR SCIENCE AND TECHNOLOGY 18 (2): 174-182 FEB 2003
Zhang WD, Zhang JF, Lalor M, et al.
Two types of neutral electron traps generated in the gate silicon dioxide
IEEE TRANSACTIONS ON ELECTRON DEVICES 49 (11): 1868-1875 NOV 2002
Zhang WD, Zhang JF, Lalor M, et al.
On the mechanism of electron trap generation in gate oxides
MICROELECTRONIC ENGINEERING 59 (1-4): 89-94 NOV 2001
Zhang WD, Zhang JF, Uren MJ, et al.
Dependence of energy distributions of interface states on stress conditions
MICROELECTRONIC ENGINEERING 59 (1-4): 95-99 NOV 2001
Zhang WD, Zhang JF, Uren MJ, et al.
On the interface states generated under different stress conditions
APPLIED PHYSICS LETTERS 79 (19): 3092-3094 NOV 5 2001
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